1. Field of the Invention
This present invention relates to a power conversion circuit for driving fluorescent lamps, and, more particularly, relates to circuitry in the power conversion circuit which controls the minimum brightness of the fluorescent lamps.
2. Description of the Related Art
Fluorescent lamps are used in a number of applications where light is required but the power required to generate light is limited. One particular type of fluorescent lamp is a cold cathode fluorescent lamp (CCFL). CCFLs are used for back or edge lighting of liquid crystal displays (LCDs) which are typically used in notebook computers, web browsers, automotive and industrial instrumentation, and entertainment systems.
CCFL tubes typically contain a gas, such as Argon, Xenon, or the like, along with a small amount of Mercury. After an initial ignition stage and the formation of plasma, current flows through the tube which results in the generation of ultraviolet light. The ultraviolet light in turn strikes a phosphoric material coated in the inner wall of the tube, resulting in visible light.
A power conversion circuit is used for driving the CCFL. The power conversion circuit accepts a direct current (DC) supply voltage and provides a substantially sinusoidal output voltage to the CCFL. The brightness of the CCFL is controlled by controlling the current (i.e., lamp current) through the CCFL. The lamp current can be amplitude modulated or time modulated for dimming control of the CCFL. Time modulation typically offers a wider dimming range.
The lamp current is time modulated by selectively turning off the sinusoidal output voltage provided to the CCFL for varying time durations. For example, the sinusoidal output voltage alternates between being on for Tx seconds and being off for Ty seconds. The period (i.e., summation of Tx and Ty) is generally fixed in constant frequency operation to reduce electro-magnetic-field (EMF) interference with other devices. The on-time duty cycle (i.e., Tx/(Tx+Ty)) determines the brightness of the CCFL. Maximum brightness results when the sinusoidal output voltage is on all the time with a 100% duty cycle (i.e., Ty=0). Minimum brightness results when the duty cycle is small (i.e., Ty greater than  greater than Tx).
A wide dimming range is desirable for efficient operation of the CCFL. The dimming range of the CCFL is generally limited by the minimum brightness that can be achieved without flickering or shimmering. To achieve minimum brightness without flickering or shimmering, the on-time of the sinusoidal output voltage needs to be the minimum time possible to produce a lamp current with a minimum number of cycles with respective amplitudes above a preset threshold.
Each lamp current cycle corresponds to a respective cycle of the sinusoidal output voltage. Ideally, each cycle of the sinusoidal output voltage produces a lamp current cycle with a respective amplitude above the threshold. However, lamp characteristics, LCD mechanical structure, operating temperature and supply voltage variations can cause the amplitudes of some of the initial lamp current cycles to fall below the threshold, thereby causing flickering or shimmering.
Prior art systems set the minimum on-time of the sinusoidal output voltage to a sufficiently long time such that the number of lamp current cycles with respective amplitudes above the threshold is equal to or greater than the required minimum number under all operating conditions. Under most conditions, the CCFL is operating above the minimum brightness with the minimum on-time setting to avoid undesired flickering or shimmering. The dimming range of the CCFL is effectively limited.
The present invention solves these and other problems by providing a minimum pulse generator circuit to control the minimum on-time of a time modulated signal to increase the dimming range of a CCFL. The minimum pulse generator circuit counts lamp current cycles and adjusts the on-time accordingly to guarantee a minimum number of cycles with respective amplitudes above a preset threshold under all operating conditions.
For example, if a user determines that six cycles with respective amplitudes above the threshold are required to achieve minimum brightness without flickering or shimmering for the CCFL, the minimum on-time is initially set to correspond to six cycles of a sinusoidal output voltage provided to the CCFL. The lamp current (i.e., current flowing through the CCFL) is sensed on a lamp return line. Lamp current cycles with respective amplitudes above the threshold are counted, and the on-time is lengthened as necessary to achieve at least six lamp current cycles with respective amplitudes above the threshold.
The minimum pulse generator circuit is part of a controller in a power conversion circuit for driving the CCFL. The controller generates signals with active states and inactive states corresponding respectively to the on-times and the off-times of the CCFL. The durations of the respective active states are equal to or greater than a minimum duration determined by the minimum pulse generator circuit which counts cycles of current flowing through the CCFL with respective amplitudes above a preset threshold. One or more control signals are provided to the controller indicating a control value for comparison with a value representing the cycles counted by the minimum pulse generator circuit.
The controller generally includes a dimming control circuit, a pulse width modulation circuit, and an oscillator circuit. The oscillator circuit provides synchronized fixed frequency signals (or some multiple thereof) for signal generation. The pulse width modulation circuit provides a time modulated signal which is the output of the controller. The dimming control circuit includes a pulse generator circuit and the minimum pulse generator circuit.
The pulse generator circuit is configured to determine an initial duration for the active states (i.e., on-times of the CCFL). The minimum pulse generator circuit is configured to determine the minimum duration for the active states. A logic gate is configured to output a signal to the pulse width modulation circuit with a duty cycle corresponding to a greater of the initial duration duty cycle and the minimum duration duty cycle. In one embodiment, the logic gate is an OR-gate.
The minimum pulse generator circuit includes a differential amplifier, a counter, and a comparator. The differential amplifier produces a pulse when a voltage representative of the current flowing through the CCFL transitions from below a reference voltage to above the reference voltage. The pulse advances a count in the counter. The current value of the count and the control value are compared by the comparator. The comparator determines when the current value of the count equals or exceeds the control value.
In one embodiment, the control value is communicated via control signals and is stored in a memory element of the minimum pulse generator circuit. The differential amplifier includes internal hysteresis. The counter is an n-bits binary counter which resets periodically. The comparator is an n-bits digital comparator.